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IRFP17N50L, SIHFP17N50L
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 130 33 59 Single
D
FEATURES
500 0.28
* SuperFast Body Diode Eliminates the Need For External Diodes in ZVS Applications * Low Gate Charge Results in Simple Drive Requirement * Enhanced dV/dt Capabilities Offer Improved Ruggedness
Available
RoHS*
COMPLIANT
* Higher Gate Voltage Threshold Offers Improved Noise Immunity * Lead (Pb)-free Available
TO-247
APPLICATIONS
G
* Zero Voltage Switching SMPS * Telecom and Server Power Supplies * Uninterruptible Power Supply
S N-Channel MOSFET
S D G
* Motor Control applications
ORDERING INFORMATION
Package Lead (Pb)-free SnPb TO-247 IRFP17N50LPbF SIHFP17N50L-E3 IRFP17N50L SIHFP17N50L
ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted
PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta EAS IAR EAR TC = 25 C PD dV/dt TJ, Tstg for 10 s 6-32 or M3 screw VGS at 10 V TC = 25 C TC = 100 C SYMBOL VDS VGS ID IDM LIMIT 500 30 16 11 64 1.8 390 16 22 220 13 - 55 to + 150 300d 10 1.1 W/C mJ A mJ W V/ns C lbf * in N*m A UNIT V
Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 C, L = 3.0 mH, RG = 25 , IAS = 16 A (see fig. 12). c. ISD 16 A, dI/dt 347 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91205 S-Pending-Rev. A, 16-Jun-08 www.vishay.com 1
WORK-IN-PROGRESS
IRFP17N50L, SIHFP17N50L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.50 MAX. 62 0.56 C/W UNIT
SPECIFICATIONS TJ = 25 C, unless otherwise noted
PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related) Internal Gate Resistance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Reverse Recovery Current IS ISM VSD trr Qrr IRRM MOSFET symbol showing the integral reverse p - n junction diode TJ = 25 C TJ = 125 C TJ = 25 C TJ =1 25 C TJ = 25 C IF = 16 A, dI/dt = 100 A/sb
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Coss Coss eff. Coss eff. (ER) Rg Qg Qgs Qgd td(on) tr td(off) tf
VGS = 0 V, ID = 250 A Reference to 25 C, ID = 1 mAd VDS = VGS, ID = 250 A VGS = 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 C VGS = 10 V ID = 9.9 Ab VDS = 50 V, ID = 9.9 Ab
500 3.0 11 -
0.60 0.28 2760 325 37 3690 84 159 120 1.4 21 51 50 28
5.0 100 50 2.0 0.32 130 33 59 -
V V/C V nA A S
VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V , f = 1.0 MHz VDS = 400 V , f = 1.0 MHz VGS = 0 V VDS = 0 V to 400 V f = 1 MHz, open drain ID = 16 A, VDS = 400 V see fig. 7 and 15b
pF
-
VGS = 10 V
-
nC
VDD = 250 V, ID = 16 A RG = 7.5 , VGS = 10 V see fig. 14a & 14bb
-
ns
-
170 220 470 810 7.3
16 A 64 1.5 250 330 710 1210 11 V ns C
G
S
TJ = 25 C, IS = 16 A, VGS = 0 Vb
-
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. c. COSS eff. is a fixed capacitance that gives the same charging time as COSS while VDS is rising fom 0 to 80 % VDS. COSS eff. (ER) is a fixed capacitance that stores the same energy as COSS while VDS is rising fom 0 to 80 % VDS. www.vishay.com 2 Document Number: 91205 S-Pending-Rev. A, 16-Jun-08
IRFP17N50L, SIHFP17N50L
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
100
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
100
ID, Drain-to-Source Current (A)
10
I D , Drain-to-Source Current (A)
TJ = 150 C
10
TJ = 25 C
1
5.0V
0.1
1
20s PULSE WIDTH Tj = 25C
0.01 0.1 1 10 100
0.1 4.0
V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0
VDS, Drain-to-Source Voltage (V)
VGS , Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
ID, Drain-to-Source Current (A)
10
VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V
RDS(on) , Drain-to-Source On Resistance (Normalized)
100
3.0
ID = 16A
2.5
2.0
5.0V
1.5
1
1.0
20s PULSE WIDTH Tj = 150C
0.1 0.1 1 10 100
0.5
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91205 S-Pending-Rev. A, 16-Jun-08
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IRFP17N50L, SIHFP17N50L
Vishay Siliconix
100000
20
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
ID = 16A V DS= 400V V DS= 250V V DS= 100V
16
10000
C, Capacitance(pF)
Ciss
1000
12
8
Coss
100
4
Crss
10 1 10 100 1000
0
0
30
60
90
120
150
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
100
ISD , Reverse Drain Current (A)
15
TJ = 150 C
10
Energy (J)
10
TJ = 25 C
1
5
0 0 100 200 300 400 500 600
0.1 0.2 0.6 0.9
V GS = 0 V
1.3 1.6
VDS, Drain-to-Source Voltage (V)
VSD ,Source-to-Drain Voltage (V)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typ. Output Capacitance Stored Energy vs. VDS
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Document Number: 91205 S-Pending-Rev. A, 16-Jun-08
IRFP17N50L, SIHFP17N50L
Vishay Siliconix
RD VDS
20
VGS RG
D.U.T. + - VDD
16
ID , Drain Current (A)
10 V
12
Pulse width 1 s Duty factor 0.1 %
Fig. 10a - Switching Time Test Circuit
8
4
VDS 90 %
0
25
50
75
100
125
150
TC , Case Temperature ( C)
10 % VGS td(on) tr td(off) tf
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
1
Thermal Response(Z thJC )
D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE)
PDM t1 t2 Notes: 1. Duty factor D =t 1 / t 2 2. Peak TJ = P DM x ZthJC + TC
0.01
0.001 0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91205 S-Pending-Rev. A, 16-Jun-08
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IRFP17N50L, SIHFP17N50L
Vishay Siliconix
EAS , Single Pulse Avalanche Energy (mJ)
1000
OPERATION IN THIS AREA LIMITED BY RDS(on)
800
ID , Drain Current (A)
100 10us 10 100us 1ms 1 10ms
640
ID 7A 10A BOTTOM 16A TOP
480
320
0.1
TC = 25 C TJ = 150 C Single Pulse
10 100 1000 10000
160
0
25
50
75
100
125
150
VDS , Drain-to-Source Voltage (V)
Starting T J , Junction Temperature ( C)
Fig. 12 - Maximum Safe Operating Area
Fig. 13 - Maximum Avalanche Energy vs. Drain Current
VDS
15 V
tp
Driver
VDS
L
RG
20 V
D.U.T
IAS tp
+ - VDD
A
0.01
IAS
Fig. 14b - Unclamped Inductive Waveforms
Current regulator Same type as D.U.T.
50 k
12 V
Fig. 14a - Unclamped Inductive Test Circuit
10 V QGS
QG
0.2 F
0.3 F
QGD D.U.T.
+ -
VDS
VG
VGS
3 mA
Charge
IG ID Current sampling resistors
Fig. 15a - Basic Gate Charge Waveform
Fig. 15b - Gate Charge Test Circuit
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Document Number: 91205 S-Pending-Rev. A, 16-Jun-08
IRFP17N50L, SIHFP17N50L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
+ +
-
RG
* * * *
dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current dI/dt D.U.T. VDS Waveform Diode Recovery dV/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices
Fig. 16. For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91205.
Document Number: 91205 S-Pending-Rev. A, 16-Jun-08
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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